Roseluosi.hashnode.dev·Dec 19, 2024FPGAs: An Innovative Path Toward the GPU SpaceIn the field of high-performance computing, Graphics Processing Units (GPUs) and Field Programmable Gate Arrays (FPGAs) each occupy a place of their own. GPUs shine with their powerful parallel computing capabilities in areas such as gaming and deep ...fpga
Chandrakiran Gchip.hashnode.dev·Dec 10, 2024Day 8: Bridging Digital and Analog Electronics – Exploring FPGA ApplicationsHello readers! Today’s journey took me deep into the interplay between digital and analog electronics, and how these domains converge in FPGA (Field-Programmable Gate Array) applications. I explored how FPGAs handle digital design and how analog conc...fpga
Ayushi Lathiyaayushilathiya.hashnode.dev·Oct 29, 2024Designing & Simulating Logic Gates in DSCH & Microwind – A Beginner’s GuideIntroduction In the field of VLSI (Very-Large-Scale Integration) design, digital circuits undergo a multi-step process before they can be physically fabricated. The initial stages involve designing and simulating circuits to ensure functionality, fol...1 like·26 readsMicrowind
Silas Madubuihesilastivity.hashnode.dev·Jan 11, 2024Designing a Programmable Read-only memory (PROM).Introduction: Programmable Read-Only Memory (PROM) is a crucial component in digital circuit design,VLSI and embedded systems, allowing users to customize memory content according to their specific needs. This article outlines key steps to design a P...2 likes·99 readsDigital electronics
ABHISHEK ANANDabhishekanand.hashnode.dev·Jul 13, 2023GSoC 2023 (Week 5 and 6): Incorporating sequential and internal combinational delaysIntroduction You can find my previous blog here. I completed the DSP48E1 primitive. Now one can successfully generate bitstreams for designs containing DSP blocks. For now, only structural instantiation is possible for DSP slices. I will be working o...71 readsgsoc2023
ABHISHEK ANANDabhishekanand.hashnode.dev·Jul 13, 2023GSoC 2023 (Week 3 and 4): Complete Architecture Description of DSP48E1Introduction You can find my previous blog here. Earlier I tried running the F4PGA toolchain by using a basic DSP48E1 primitive. I made the necessary changes throughout the toolchain to allow the generation of a bitstream for designs containing DSP i...2 likes·100 readsGoogleSummerOfCode
ABHISHEK ANANDabhishekanand.hashnode.dev·May 30, 2023GSoC 2023: The proposal that got me inABSTRACT F4PGA is an open-source FPGA toolchain designed as a free alternative to proprietary computer-aided design tools like Xilinx’s Vivado. Currently, mapping designs to DSP blocks and generating DSP block bitstreams are not implemented for the ...11 likes·299 readsgsoc2023
Mark Liudrex-electronics.hashnode.dev·Jan 10, 2023DRex Electronics: Top 4 FPGA programming languagesHongkong, Jan 10, 2023 /Hashnode/ -- DRex Electronics is a global distributor of electronic components. which offers a wide range of products including integrated circuits, FPGA, capacitors, connectors, diodes, transistors, and more. Field Programmab...fpga
Embedsys Weeklyembeddedsystems.hashnode.dev·Oct 7, 2022Embedded Systems Weekly #121This week I started to work on a directory of embedded systems companies. It is 100% free and public. It is as well reserved for companies with less than 50 people and with more than 20% of people dedicated to embedded systems. I planned to work on t...embedded systems
Asanka Akash Sovisasanka.hashnode.dev·Sep 26, 202204. One-Bit Register - Eight-Bit ComputerIn order to convert the D flip flop into an actual one-bit registry, we must go through a few additional steps. In order to do this, we must have a way to load and save the data into it. For this, on the one hand, we must have a method to only load w...88 reads🧮 Eight-Bit Computerfpga
