RISC-V RV32M1 VEGA Board BSP(Board Support Package)
1. Basic Information
RV32M1_VEGA board is a heterogeneous multi-core RISC-V 32 development board that contains two RISC-V 32-bit cores, as well as BLE peripherals.
The toolchain currently used for test is built from the standard GNU GCC 7.2.0 and newlib 2.5.0 and for the standard RV32IMC architecture, so the extension instructions of RV32M1 is not supported, note that the version of RT-Thread ENV used in this BSP is 1.0.
It's recommended to use the env tool to compile programs on Windows. Switch to the directory
bsp/rv32m1_vega/ri5cy in the console and run the following command to compile this BSP:
If successfully compiled, a new 'rtthread.elf' and 'rtthread.bin' file will be generated. ‘rtthread.bin' needs to be burned to the device and run.
3. Burn and Run
Please use JLink to connect to the JTAG interface of the RISC-V core on the RV32M1_VEGA board, and change the JLink driver to WinUSB mode. The JTAG interface is located next to the RV32M1 chip and the antenna seat, with a small 20pin JTAG interface.
Use a USB cable to connect to a USB port marked with SDA, then a serial device is recognized by PC, which can be opened with the configuration of 115200-N-8-1. The serial pins used by the device are:
When the rtthread.bin image file is generated after being correctly compiled, you can use gdb to connect to openocd and burn it to flash with the
For more information about how to use JTAG and how to use gdb to debug the RV32M1_VEGA development board, please refer to Development Environment Construction.
3.1 Running Results
When the compiling and burning are done correctly, press the reset button
SW1 to reset the device, the startup message of RT-Thread can be observed via the serial port :
\ | / - RT - Thread Operating System / | \ 4.0.0 build Dec 5 2018 2006 - 2018 Copyright by rt-thread team File System initialized! Hello RT-Thread! msh />
4. Driver Supporting Condition
4.1 IO mapping in BSP
RT-Thread Contact Info:
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