I am a senior software engineer specializing in low-level systems, including firmware development, embedded Linux, and FPGA/SoC prototyping. As a lifelong technology enthusiast, he enjoys exploring every layer of the software stack—from application-level tooling down to bare-metal firmware—always with an engineer’s focus on how systems really work. Beyond writing technical blogs, I also build hands-on projects ranging from C++ applications to FPGA-based SoC designs, which has shaped a practical, workflow-driven approach to learning and problem solving.
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Jan 30 · 8 min read · Why reverse engineering matters If you’ve ever stared at a stripped firmware image and asked, “Where does this boot? What does it talk to? Why does it lock up?”—you’ve already brushed against reverse engineering (RE). I got into RE the same way many ...
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Aug 28, 2025 · 8 min read · SW/HW Co-Simulation—What It’s For and How We Do It Software/hardware co-simulation links executable software to a hardware model to verify behavior before silicon or FPGA bring-up. Teams use it at two levels: unit-level (e.g., HLS IP correctness and ...
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Aug 11, 2025 · 4 min read · 1. Background & Motivation Modern RISC-V SoC development often demands parallel hardware and firmware progress. Waiting for RTL completion or silicon fabrication delays firmware bring-up and can mask integration bugs until late in the project. Tradit...
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Apr 6, 2025 · 13 min read · Preface In the previous blog, we explored the key features of HLS C++ and the fundamentals of SmartHLS. In this post, I will discuss the HLS application development lifecycle, using the RGB2YCbCr project as an example. HLS Application Development Lif...
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