mahammad.hashnode.devSV Part-9 Test-Bench ArchitectureFunctional Verification: what is functional verification : process of validating the design functionality (RTL code) against design specification. Functional verification engineer: Catching Functional issues(design issues) 2 inputs : Design spec...Nov 27, 2025·5 min read
mahammad.hashnode.devSV Part-8 AssertionsAssertions assertions are pin point checkers Why Assertions are required : in traditional TB based(functional verification) reference model and checker, the design issues are caught in the checker during design output comparison with reference out...Nov 26, 2025·5 min read
mahammad.hashnode.devSV Part-7 CoverageTest Bench: generating the inputs, driving those inputs to the design and checking the expected values with actual values. when we will conclude our verification was done? whenever we got 100% coverage and 100% assertion based verification, we wi...Nov 25, 2025·7 min read
mahammad.hashnode.devSV Part-6 communicationInter process communication Inter-Process Communication (IPC) means: Two or more processes (different blocks of code running in parallel) communicating or synchronizing with each other. SV FeatureWhy SemaphoreCreated using new(), used for sy...Nov 24, 2025·4 min read
mahammad.hashnode.devSV Part -5 fork-join and constraintsfork-join need for fork join : Test bench components (BFM,Generator,Monitor) can have multiple concurrent running process. in verilog module, concurrent process can be implemented using multiple always blocks. 3 concurrent process -->use 3 always bl...Nov 23, 2025·8 min read
