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Nov 27, 2025 · 5 min read · Functional Verification: what is functional verification : process of validating the design functionality (RTL code) against design specification. Functional verification engineer: Catching Functional issues(design issues) 2 inputs : Design spec...
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Nov 26, 2025 · 5 min read · Assertions assertions are pin point checkers Why Assertions are required : in traditional TB based(functional verification) reference model and checker, the design issues are caught in the checker during design output comparison with reference out...
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Nov 25, 2025 · 7 min read · Test Bench: generating the inputs, driving those inputs to the design and checking the expected values with actual values. when we will conclude our verification was done? whenever we got 100% coverage and 100% assertion based verification, we wi...
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Nov 24, 2025 · 4 min read · Inter process communication Inter-Process Communication (IPC) means: Two or more processes (different blocks of code running in parallel) communicating or synchronizing with each other. SV FeatureWhy SemaphoreCreated using new(), used for sy...
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Nov 23, 2025 · 8 min read · fork-join need for fork join : Test bench components (BFM,Generator,Monitor) can have multiple concurrent running process. in verilog module, concurrent process can be implemented using multiple always blocks. 3 concurrent process -->use 3 always bl...
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