SMshatakshi mishrainhow-iommu-mitigates-dma-risks.hashnode.dev·Sep 30 · 13 min readThe end of the monolithic chipEvery flagship AI accelerator shipping in 2026 is an assembly of dies. The interesting question is no longer whether to disaggregate, but how far. For decades the recipe for a faster chip was simple. 00
SMshatakshi mishrainhow-iommu-mitigates-dma-risks.hashnode.dev·Sep 30 · 4 min readThe Mythos Tier Has an Awkward ProblemFor most of this year the question "which Claude is the most capable" had an easy answer. Anthropic introduced a tier above Opus, called it Mythos, and put Fable 5 in it. If you needed the best, you p00
SMshatakshi mishrainmemoryiointerconnects.hashnode.dev·Mar 31 · 6 min readCompute Express Link (CXL)Redefining Memory and Accelerator Architectures Introduction Modern computing workloads—AI/ML, cloud-native applications, databases, analytics, and high-performance networking—are pushing systems far 00
SMshatakshi mishrainmemory-management.hashnode.dev·Mar 31 · 9 min readThe Hidden Cost of Memory: TLBs, Page Tables, and Huge PagesIntroduction Every memory access your program makes passes through a translation layer that converts virtual addresses to physical ones. This translation is so fast and so transparent that most develo00
SMshatakshi mishrainhow-iommu-mitigates-dma-risks.hashnode.dev·Dec 19, 2025 · 9 min readSecuring Device DMA with IOMMUs in Virtualized and Multi-Tenant SystemsDirect Memory Access (DMA) and Input-Output Memory Management Unit (IOMMU) explained: DMA (Direct Memory Access): Allows hardware devices to move data directly between their internal buffers and system memory, with the CPU only setting up the transf...00
