From a Simple FSM to Hardware Control-Flow Integrity: Understanding the Purpose of the RISC-V CFI Coding ChallengeIntroduction After spending the past few days studying the RISC-V Control-Flow Integrity (CFI) specification, one question kept coming to my mind. Why was the coding challenge designed as such a simplJul 23 · 5 min readrandomchecking.hashnode.dev
Understanding the RISC-V Control-Flow Integrity (CFI) ISA - Part 3: Privileged ArchitectureIntroduction In the previous two posts, I explored the Landing Pad (Zicfilp) and Shadow Stack (Zicfiss) extensions from the Unprivileged ISA. Those chapters describe how the instructions work and how Jul 22 · 5 min readrandomchecking.hashnode.dev
Understanding the RISC-V Control-Flow Integrity (CFI) ISA - Part 2: Shadow Stack (Zicfiss)Introduction In the previous blog, I explored Landing Pads (Zicfilp), which protect forward-edge control flow by ensuring that indirect branches only reach authorized destinations. The second part of Jul 22 · 6 min readrandomchecking.hashnode.dev
Understanding the RISC-V Control-Flow Integrity (CFI) ISA - Part 1: Landing Pads (Zicfilp)Introduction I started studying the recently RISC-V Control-Flow Integrity (CFI) ISA extensions. I wanted to first understand why these extensions exist and what security problems they solve. This posJul 22 · 5 min readrandomchecking.hashnode.dev
My Understanding of RV-Sparse and Why Sparse Linear Algebra on RISC-V MattersMy Understanding of RV-Sparse and Why Sparse Linear Algebra on RISC-V Matters Recently, while exploring open-source systems and computer architecture projects, I came across the RV-Sparse project: RV-May 15 · 6 min readwaleed-risc-v.hashnode.dev
