The point about starting from the measured sleep floor rather than the datasheet number matches what I see on small ESP32 builds, where regulator quiescent current and a leaky divider often outweigh the chip itself. Have you found that wake-up retries in weak signal are usually the biggest single drain in the field, or is paging/PSM timer config a bigger factor? A quick tip: logging charge used per report cycle (not just average current) makes those retry spikes easy to spot.