NINinad Ingaleintechnophileholmes.hashnode.dev·Sep 30 · 45 min readThe Silicon Sorting Hat: Demystifying CPU, GPU, and TPU Architectures"People who are really serious about software should make their own hardware." ---- Alan Kay For decades, if you bought a computer or built software, you relied on one undisputed brain: the CPU (Cent21K
MCMatteo Collinainblog.platformatic.dev·Sep 24 · 4 min readMore threads on an already busy machineThe bcrypt numbers in Nub’s thread-pool PR make a good case for increasing the pool on the machines tested. The part I disagree with is choosing that setting for every application from its CPU count. 10
SSaguninsagunwrites.hashnode.dev·Aug 24 · 5 min readProcess vs Thread: What Is the Difference?A process is one of the most important concepts in operating systems. But when a process needs to perform multiple activities at the same time, the operating system can use another concept: a thread. 00
LTLưu Tuấn Anhinblog.fiscybersec.com·Aug 20 · 8 min readInterrupt Injection Vulnerability: When the CPU's Specter v2 "shield" is punctured for a few secondsDo you think your system is absolutely safe after activating all Specter v2 defense mechanisms? A recent study from MIT CSAIL may make you think again. By simply inserting a hardware interrupt into a 00
SSaguninsagunwrites.hashnode.dev·Aug 20 · 4 min readWhat Is a Batch Operating System?Imagine having a large number of tasks that need to be processed, but users don't need to interact with the computer while each task is running. Instead of handling each task individually, the operati00
SSaguninsagunwrites.hashnode.dev·Aug 16 · 7 min readRelative Addressing ModeIn the previous article, we learned about Indirect Addressing, where the instruction leads to an address that contains the actual address of the operand. Now we'll learn about Relative Addressing Mode00
SSaguninsagunwrites.hashnode.dev·Aug 16 · 5 min readRegister Addressing ModeIn the previous article, we learned about Immediate Addressing Mode, where the operand value is included directly inside the instruction. Now we'll look at another common addressing mode: Register Add00
SSaguninsagunwrites.hashnode.dev·Aug 16 · 9 min readAddressing ModesA CPU instruction tells the processor what operation to perform. But when an instruction needs data, another question appears: Where is that data located? The method used by an instruction to specify 00
SSaguninsagunwrites.hashnode.dev·Aug 16 · 6 min readIndexed Addressing ModeIn the previous article, we learned about Base Register Addressing, where the CPU combines a base address with an offset to find the effective address. Now we'll learn about Indexed Addressing Mode, w00
SSaguninsagunwrites.hashnode.dev·Aug 16 · 6 min readRegister Indirect Addressing ModeIn the previous article, we learned about Register Addressing, where the operand is stored directly inside a CPU register. Now we're going one level deeper. In Register Indirect Addressing, the regist00
