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AGAhmad Gazaliahmadgaz.hashnode.devFeb 2 · 16 min read

How Pipelined CPUs are Designed

In this article, I'll go over how to design a pipelined processor. The processor implements a Hennessy & Patterson-style MIPS RISC instruction set architecture. I provide some parts of the implementation in SystemVerilog. You can browse the full sour...

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JMJyotiprakash Mishrablog.jyotiprakash.orgAug 28, 2024 · 22 min read

MIPS Single-Cycle Datapath

The single-cycle data path for MIPS in the image includes various control signals that govern how the data path components operate during the execution of an instruction. Here's a description of each control signal: RegDst: This signal controls whic...

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JMJyotiprakash Mishrablog.jyotiprakash.orgAug 8, 2024 · 42 min read

Instruction-Level Parallelism

Instruction Level Parallelism (ILP) refers to the ability of a processor to execute multiple instructions simultaneously during a single clock cycle. This parallelism is inherent in the sequence of instructions in a program. ILP aims to utilize this ...

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JMJyotiprakash Mishrablog.jyotiprakash.orgAug 4, 2024 · 66 min read

Delving Deeper into the MIPS Pipeline

Pipelining is an implementation technique that allows multiple instructions to overlap in execution by exploiting parallelism. This technique is pivotal in creating fast CPUs today. Understanding Pipelining Through an Analogy Think of a pipeline as s...

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JMJyotiprakash Mishrablog.jyotiprakash.orgJul 30, 2024 · 13 min read

MIPS Instruction Set Architecture

The MIPS (Microprocessor without Interlocked Pipeline Stages) Instruction Set Architecture (ISA) is one of the most widely studied and implemented ISAs in the field of computer science and engineering. Developed in the early 1980s at Stanford Univers...

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TATanvir Ahmed Khantanvirahmedkhan.hashnode.devOct 3, 2023 · 2 min read

Division and Multiplication in Assembly Language (MIPS32 ISA)

💡 You can use Cpulator (Online Simulator) to execute this code. 💡 Remember to set the stack pointer beforehand, otherwise, it might throw you an 'overflow' error. The stack pointer is typically initialized to the highest address in the data segm...

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TATanvir Ahmed Khantanvirahmedkhan.hashnode.devOct 3, 2023 · 3 min read

Square Root Function Implementation in Assembly Language (MIPS32 ISA)

💡 You can use Cpulator (Online Simulator) to execute this code. 💡 Remember to set the stack pointer beforehand, otherwise, it might throw you an 'overflow' error. The stack pointer is typically initialized to the highest address in the data segm...

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Trending tags this week

How Pipelined CPUs are Designed

MIPS Single-Cycle Datapath

Instruction-Level Parallelism

Delving Deeper into the MIPS Pipeline

MIPS Instruction Set Architecture

Division and Multiplication in Assembly Language (MIPS32 ISA)

Square Root Function Implementation in Assembly Language (MIPS32 ISA)