In Silicon: Common Warnings in Verilog (1)
Feb 3 · 4 min read · In C, when the compiler warns you about an unused variable or an implicit conversion, you can shrug it off and the program runs fine. The warning might point to sloppy code, but the CPU does not care. It executes what you wrote. Verilog is different....
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In Silicon: Exceptional Points in Verilog (1)
Feb 1 · 5 min read · The first thing to realize when moving from C to Verilog is that you are no longer writing a script but instead describing a physical hardware. The action of code evolves from being a recipe into being a blueprint. And this evolution happens with lea...
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How to evaluate and improve the resource utilization of FPGA?
Jan 9 · 5 min read · Evaluating (and improving) FPGA resource utilization is mostly a repeatable flow: Measure accurately (what is used, where, and why) Find the true drivers (logic vs memory vs DSP vs routing/congestion) Change architecture / RTL / tool directives wi...
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What is Pmod in FPGA?
Dec 29, 2025 · 2 min read · Pmod (usually written Pmod™) in the FPGA world means “Peripheral Module”: a small plug-in add-on board standard popularized by Digilent that lets you connect sensors, displays, ADCs/DACs, motor drivers, etc. to an FPGA board through a simple header. ...
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Building a Scalable Token Bucket Rate Limiter on FPGA
Dec 23, 2025 · 2 min read · Token Bucket rate limiting is widely used to enforce bandwidth and QoS guarantees in hardware systems. While the concept is simple, implementing it efficiently for hundreds or thousands of clients on FPGA is far from trivial. This article highlights ...
Join discussionWhat is FPGA fabric?
Dec 19, 2025 · 2 min read · FPGA fabric is the “reconfigurable hardware area” of an FPGA—the big grid of programmable logic and routing that you map your design onto. Think of an FPGA as a city: Fabric = the city blocks + roads you can rewire. Your HDL/HLS design becomes “bui...
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What is a boot image in FPGA?
Dec 12, 2025 · 4 min read · A boot image in an FPGA is basically the “power-on brain file” that tells an (SRAM-based) FPGA what hardware it should become when the board powers up. More formally: A boot image is the configuration data (bitstream) — often wrapped with headers, c...
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Do all HFT systems use FPGA for achieveing low latency?
Dec 5, 2025 · 3 min read · Nope, not all HFT systems use FPGAs – but FPGAs are a very popular tool in the ultra-low-latency end of the spectrum. Let’s break it down in a reality-based way. 1. Who actually uses FPGAs in HFT? Rough picture: Top-tier “race to zero” shops (sub-m...
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How to select FPGA pins in Verilog?
Nov 14, 2025 · 3 min read · You don’t actually “select FPGA pins” inside Verilog – you name ports in Verilog, and then you map those ports to physical pins using a constraints file (or pin planner GUI) in your FPGA tools. Think of it as: Verilog = logical signalsConstraints (X...
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